risc-v 支持spike和qemu虚拟器的一些例程的编译和运行
本帖最后由 皋陶 于 2020-8-27 14:13 编辑克隆和编译这些例程git clone https://github.com/michaeljclark/riscv-probe.git
make
编译，表示这是一个可选的选项，riscv64-unknown-elf-代表risc-v gcc编译链的路径。
spike运行
spike --isa=RV32IMAFDC build/bin/rv32imac/spike/probe
spike --isa=RV64IMAFDC build/bin/rv64imac/spike/probe
qemu运行
qemu-system-riscv32 -nographic -machine spike_v1.10 -kernel build/bin/rv32imac/spike/probe
qemu-system-riscv64 -nographic -machine spike_v1.10 -kernel build/bin/rv64imac/spike/probe
qemu-system-riscv32 -nographic -machine virt -kernel build/bin/rv32imac/virt/probe
qemu-system-riscv64 -nographic -machine virt -kernel build/bin/rv64imac/virt/probe
qemu-system-riscv32 -nographic -machine sifive_e -kernel build/bin/rv32imac/qemu-sifive_e/probe
qemu-system-riscv64 -nographic -machine sifive_e -kernel build/bin/rv64imac/qemu-sifive_e/probe
qemu-system-riscv32 -nographic -machine sifive_u -kernel build/bin/rv32imac/qemu-sifive_u/probe
qemu-system-riscv64 -nographic -machine sifive_u -kernel build/bin/rv64imac/qemu-sifive_u/probe
运行截图
本篇完，感谢关注：RISC-V单片机中文网
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