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本帖最后由 新ちゃん 于 2020-8-21 03:55 编辑
本文参考:https://github.com/drichmond/RISC-V-On-PYNQ
RISC-V On PYNQ下载依赖包及配置环境1:下载PYNQ-Z2的镜像:PYNQ-Z2 v2.4 PYNQ image http://www.pynq.io/board.html?tdsourcetag=s_pcqq_aiomsg 2:烧写镜像到SD卡上,在MobaXterm用SSH方式连接PYNQ-Z2 3:通过命令行下载git工具: - $sudo apt-get update
- $sudo apt-get install git
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4:下载和安装依赖包: - apt -y install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev git
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5:下载两个源存储库:
- git clone --recursive https://github.com/riscv/riscv-gnu-toolchain /home/xilinx/riscv-gnu-toolchain
- git clone --recursive https://github.com/drichmond/RISC-V-On-PYNQ /home/xilinx/RISC-V-On-PYNQ
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生成RISC-V处理器比特流
将RISC-V封装为Vivado IP
1:使用Vivado 2017.4创建一个工程: Project name: picorv32_prj Project location: /home/xilinx/RISC-V-On-PYNQ/ip/ Project Type: RTL Project Source files: picorv32.v /home/xilinx/RISC-V-On-PYNQ/picorv32 Constraint files: None parts: xc7z020clg400-1
2:将自定义接口IP添加到Vivado工程:
Flow Navigator->PROJECT MANAGER->Settings
3:将picorv32 Vivado项目封装为IP:Tools -> Create and Package New IP…
Packaging Options: Package your current project IP location: /home/xilinx/RISC-V-On-PYNQ/ip/picorv32_tut
IdentificationVendor: cliffordwolf Library: ip Name: picorv32_tut Display name: PicoRV32 Processor with AXI Interface(Tutorial Version) Vendor display name: PicoRV32 Processor with AXI Interface(Tutorial Version)
Customization Parameters所有的参数值的格式都改为:bool ENABLE_MUL Value: true ENABLE_FAST_MUL Value: true
Ports and Interfaces
右键mem_axi->Edit Interface…
General: Interface Definition: aximm_rtl Port Mapping: AWADDR - mem_axi_awaddr AWPROT - mem_axi_awprot AWVALID - mem_axi_awvalid AWREADY - mem_axi_awready WDATA - mem_axi_wdata WSTRB - mem_axi_wstrb WVALID - mem_axi_wvalid WREADY - mem_axi_wready BVALID - mem_axi_bvalid BREADY - mem_axi_bready ARADDR - mem_axi_araddr ARPROT - mem_axi_arprot ARVALID - mem_axi_arvalid ARREADY - mem_axi_arready RDATA - mem_axi_rdata RVALID - mem_axi_rvalid RREADY - mem_axi_rready
Addressing and Memory运行Addressing and Memory Map Wizard: IP Interface: mem_axi mem_axi Range: 4294967296 mem_axi Width: 32
Review and Package点击Package IP:
为PYNQ-Z2创建RISC-V比特流
将/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/目录下的PYNQ-Z1.xdc文件的72,73行改为如下: - set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports arduino_iic_scl_io]
- set_property -dict {PACKAGE_PIN P16 IOSTANDARD LVCMOS33} [get_ports arduino_iic_sda_io]
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执行以下命令:
- make -C /home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/ synth
- vivado tutorial/tutorial.xpr
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4:打开tutorial.bd文件
双击tutorialProcessor:
点击 + 号,将 PicoRV32 Processor with AXI Interface (Tutorial Version) IP添加进去:
并按下图连线:
5:进入Address Editor窗口,分配地址映射:
右击tutorialProcessor/riscvBramController->Assign Address
Offset Address: 0x0000_0000 High Address: 0x0000_FFFF
运行Tools->Validate Design:
将mem_axi频率改为50000000,再次运行:
6:生成比特流,点击Generate Bitstream,最后在/tut/tutorial/tutorial.runs/impl_1目录下生成一个tutorial_wrapper.bit文件,将该文件移动到tut目录下,并改名为tutorial.bit.
7:将设计导出到tcl文件中并覆盖之前的tcl文件,File->Exports…->Export Block Design,确保Automatically create top design没有被勾选
8:将上述tutorial.bit和tutorial.tcl文件通过SSH放到PYNQ-Z2的home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut目录下
在PYNQ-Z2上编译RISC-V GCC工具链
1:通过MobaXterm以SSH方式连接PYNQ-Z2,在终端/home/xilinx/riscv-gnu-toolchain/目录下依次执行以下命令进行编译: - ./configure --prefix=/opt/riscv32im --with-arch=rv32im
- make
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最后在/opt目录下生成riscv32im文件夹
2:将生成的/opt/riscv32im/bin配置到环境变量中,在Jupyter Notebooks中执行以下代码: - import os
- path = os.environ['PATH'].split()
- riscv_path = '/opt/riscv32im/bin'
- if(riscv_path not in path):
- print('Updating /etc/environment file... ',end="")
- !sed -i 's/PATH="\(.*\)"/PATH="\/opt\/riscv32im\/bin:\1"/' /etc/environment
- print('done')
- else:
- print("/etc/environment file already updated")
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显示 Updating /etc/environment file… done 即配置完成
3:重启PYNQ-Z2:
4:重启后确认RISC-V工具链已经成功安装:
- !riscv32-unknown-elf-gcc --version
复制代码显示 riscv32-unknown-elf-gcc 版本号即已成功安装。
封装成一个Overlay1、在home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/文件夹下新建tutorial.py文件,文件内容如下: - from pynq import Overlay, GPIO, Register
- import os
- import inspect
- from riscvonpynq.Processor import BramProcessor
- #--------
- class TutorialOverlay(Overlay):
- """Overlay driver for the PicoRV32 bram Overlay
- Note
- ----
- This class definition must be co-located with the .tcl and .bit
- file for the overlay for the search path modifications in
- riscvonpynq.Overlay to work. __init__ in riscvonpynq.Overlay uses
- the path of this file to search for the .bit file using the
- inspect package.
- """
- pass
- class TutorialProcessor(BramProcessor):
- """Hierarchy driver for the PicoRV32 BRAM Processor
- Note
- ----
- In order to be recognized as a RISC-V Processor hierarchy, three
- conditions must be met: First, there must be a PS-Memory-Mapped
- Block RAM Controller where the name matches the variable
- _bram. Second, the hierarchy name (fullpath) must equal the
- variable _name. Finally, there must be a GPIO port with the name
- _reset_name.
- Subclasses of this module are responsible for setting _name (The
- name of the Hierarchy), _bits (Processor bit-width), _proc
- (Processor Type Name)
- This class must be placed in a known location relative to the
- build files for this processor. The relative path can be modified
- in __get_path.
- """
- _name = 'tutorialProcessor'
- _proc = 'picorv32'
- _bits = 32
- @classmethod
- def checkhierarchy(cls, description):
- return super().checkhierarchy(description)
- def __get_path(self):
- """Get the directory path of this file, or the directory path of the
- class that inherits from this class.
- """
- # Get file path of the current class (i.e. /opt/python3.6/<...>/stream.py)
- file_path = os.path.abspath(inspect.getfile(inspect.getmodule(self)))
- # Get directory path of the current class (i.e. /opt/python3.6/<...>/stream/)
- return os.path.dirname(file_path)
- def __init__(self, description, *args):
- """Return a new Processor object.
- Parameters
- ----------
- description : dict
- Dictionary describing this processor.
- """
- build_path = os.path.join(self.__get_path(), "build")
- reset_value = 0
- super().__init__(build_path, reset_value, description, *args)
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