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在PYNQ-Z2上移植RISC-V

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    [LV.4]

    发表于 2020-8-17 16:07:38 | 显示全部楼层 |阅读模式

    有人预言,RISC-V或将是继Intel和Arm之后的第三大主流处理器体系。欢迎访问全球首家只专注于RISC-V单片机行业应用的中文网站

    您需要 登录 才可以下载或查看,没有帐号?立即注册

    x
    本帖最后由 新ちゃん 于 2020-8-21 03:55 编辑

    本文参考:https://github.com/drichmond/RISC-V-On-PYNQ


    RISC-V On PYNQ下载依赖包及配置环境

    1:下载PYNQ-Z2的镜像:PYNQ-Z2 v2.4 PYNQ image

    http://www.pynq.io/board.html?tdsourcetag=s_pcqq_aiomsg

    2:烧写镜像到SD卡上,在MobaXterm用SSH方式连接PYNQ-Z2

    3:通过命令行下载git工具:

    1. $sudo apt-get update
    2. $sudo apt-get install git
    复制代码

    4:下载和安装依赖包:

    1. apt -y install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev git
    复制代码

    5:下载两个源存储库:
    1. git clone --recursive https://github.com/riscv/riscv-gnu-toolchain /home/xilinx/riscv-gnu-toolchain
    2. git clone --recursive https://github.com/drichmond/RISC-V-On-PYNQ /home/xilinx/RISC-V-On-PYNQ
    复制代码

    生成RISC-V处理器比特流

    将RISC-V封装为Vivado IP

    1:使用Vivado 2017.4创建一个工程:

    Project name: picorv32_prj

    Project location: /home/xilinx/RISC-V-On-PYNQ/ip/

    Project Type: RTL Project

    Source files: picorv32.v /home/xilinx/RISC-V-On-PYNQ/picorv32

    Constraint files: None

    parts: xc7z020clg400-1

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(1)

    2:将自定义接口IP添加到Vivado工程:

    Flow Navigator->PROJECT MANAGER->Settings

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(2)


    3:将picorv32 Vivado项目封装为IP:Tools -> Create and Package New IP…

    Packaging Options: Package your current project

    IP location: /home/xilinx/RISC-V-On-PYNQ/ip/picorv32_tut

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    Identification

    Vendor: cliffordwolf

    Library: ip

    Name: picorv32_tut

    Display name: PicoRV32 Processor with AXI Interface(Tutorial Version)

    Vendor display name: PicoRV32 Processor with AXI Interface(Tutorial Version)


    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(4)


    Customization Parameters

    所有的参数值的格式都改为:bool

    ENABLE_MUL Value: true

    ENABLE_FAST_MUL Value: true

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(5)


    Ports and Interfaces
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(6)

    右键mem_axi->Edit Interface…

    General:

    ​ Interface Definition: aximm_rtl

    Port Mapping:

    ​ AWADDR - mem_axi_awaddr

    ​ AWPROT - mem_axi_awprot

    ​ AWVALID - mem_axi_awvalid

    ​ AWREADY - mem_axi_awready

    ​ WDATA - mem_axi_wdata

    ​ WSTRB - mem_axi_wstrb

    ​ WVALID - mem_axi_wvalid

    ​ WREADY - mem_axi_wready

    ​ BVALID - mem_axi_bvalid

    ​ BREADY - mem_axi_bready

    ​ ARADDR - mem_axi_araddr

    ​ ARPROT - mem_axi_arprot

    ​ ARVALID - mem_axi_arvalid

    ​ ARREADY - mem_axi_arready

    ​ RDATA - mem_axi_rdata

    ​ RVALID - mem_axi_rvalid

    ​ RREADY - mem_axi_rready

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(7)




    Addressing and Memory

    运行Addressing and Memory Map Wizard:

    IP Interface: mem_axi

    mem_axi Range: 4294967296

    mem_axi Width: 32

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(8)


    Review and Package

    点击Package IP:

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(9)




    为PYNQ-Z2创建RISC-V比特流

    将/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/目录下的PYNQ-Z1.xdc文件的72,73行改为如下:

    1. set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports arduino_iic_scl_io]
    2. set_property -dict {PACKAGE_PIN P16 IOSTANDARD LVCMOS33} [get_ports arduino_iic_sda_io]
    复制代码

    执行以下命令:
    1. make -C /home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/ synth
    2. vivado  tutorial/tutorial.xpr
    复制代码


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    4:打开tutorial.bd文件
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(11)

    双击tutorialProcessor:

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(12)


    点击 + 号,将 PicoRV32 Processor with AXI Interface (Tutorial Version) IP添加进去:
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(13)

    并按下图连线:
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(14)

    5:进入Address Editor窗口,分配地址映射:
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(15)


    右击
    tutorialProcessor/riscvBramController->Assign Address

    Offset Address: 0x0000_0000

    High Address: 0x0000_FFFF

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(16)

    运行Tools->Validate Design:
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(17)


    将mem_axi频率改为50000000,再次运行:
    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(18)

    6:生成比特流,点击Generate Bitstream,最后在/tut/tutorial/tutorial.runs/impl_1目录下生成一个tutorial_wrapper.bit文件,将该文件移动到tut目录下,并改名为tutorial.bit.


    7:将设计导出到tcl文件中并覆盖之前的tcl文件,File->Exports…->Export Block Design,确保Automatically create top design没有被勾选

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(19)


    8:将上述tutorial.bit和tutorial.tcl文件通过SSH放到PYNQ-Z2的home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut目录下


    在PYNQ-Z2上编译RISC-V GCC工具链

    1:通过MobaXterm以SSH方式连接PYNQ-Z2,在终端/home/xilinx/riscv-gnu-toolchain/目录下依次执行以下命令进行编译:

    1. ./configure --prefix=/opt/riscv32im --with-arch=rv32im
    2. make
    复制代码

    最后在/opt目录下生成riscv32im文件夹


    2:将生成的/opt/riscv32im/bin配置到环境变量中,在Jupyter Notebooks中执行以下代码:

    1. import os
    2. path = os.environ['PATH'].split()
    3. riscv_path = '/opt/riscv32im/bin'
    4. if(riscv_path not in path):
    5.     print('Updating /etc/environment file... ',end="")
    6.     !sed -i 's/PATH="\(.*\)"/PATH="\/opt\/riscv32im\/bin:\1"/' /etc/environment
    7.     print('done')
    8. else:
    9.     print("/etc/environment file already updated")
    复制代码

    显示 Updating /etc/environment file… done 即配置完成


    3:重启PYNQ-Z2:

    1. !shutdown -r now
    复制代码

    4:重启后确认RISC-V工具链已经成功安装:
    1. !riscv32-unknown-elf-gcc --version
    复制代码

    显示 riscv32-unknown-elf-gcc 版本号即已成功安装。


    封装成一个Overlay

    1、在home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/文件夹下新建tutorial.py文件,文件内容如下:

    1. from pynq import Overlay, GPIO, Register
    2. import os
    3. import inspect
    4. from riscvonpynq.Processor import BramProcessor
    5. #--------
    6. class TutorialOverlay(Overlay):
    7.     """Overlay driver for the PicoRV32 bram Overlay

    8.     Note
    9.     ----
    10.     This class definition must be co-located with the .tcl and .bit
    11.     file for the overlay for the search path modifications in
    12.     riscvonpynq.Overlay to work. __init__ in riscvonpynq.Overlay uses
    13.     the path of this file to search for the .bit file using the
    14.     inspect package.

    15.     """
    16.     pass

    17. class TutorialProcessor(BramProcessor):
    18.     """Hierarchy driver for the PicoRV32 BRAM Processor

    19.     Note
    20.     ----
    21.     In order to be recognized as a RISC-V Processor hierarchy, three
    22.     conditions must be met: First, there must be a PS-Memory-Mapped
    23.     Block RAM Controller where the name matches the variable
    24.     _bram. Second, the hierarchy name (fullpath) must equal the
    25.     variable _name. Finally, there must be a GPIO port with the name
    26.     _reset_name.

    27.     Subclasses of this module are responsible for setting _name (The
    28.     name of the Hierarchy), _bits (Processor bit-width), _proc
    29.     (Processor Type Name)

    30.     This class must be placed in a known location relative to the
    31.     build files for this processor. The relative path can be modified
    32.     in __get_path.

    33.     """
    34.     _name = 'tutorialProcessor'
    35.     _proc = 'picorv32'
    36.     _bits = 32

    37.     @classmethod
    38.     def checkhierarchy(cls, description):
    39.         return super().checkhierarchy(description)

    40.     def __get_path(self):
    41.         """Get the directory path of this file, or the directory path of the
    42.         class that inherits from this class.

    43.         """
    44.         # Get file path of the current class (i.e. /opt/python3.6/<...>/stream.py)
    45.         file_path = os.path.abspath(inspect.getfile(inspect.getmodule(self)))
    46.         # Get directory path of the current class (i.e. /opt/python3.6/<...>/stream/)
    47.         return os.path.dirname(file_path)

    48.     def __init__(self, description, *args):
    49.         """Return a new Processor object.

    50.         Parameters
    51.         ----------
    52.         description : dict
    53.             Dictionary describing this processor.

    54.         """
    55.         build_path = os.path.join(self.__get_path(), "build")
    56.         reset_value = 0
    57.         super().__init__(build_path, reset_value, description, *args)
    复制代码




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      离线 

  • TA的每日心情
    奋斗
    2021-1-15 13:53
  • 签到天数: 26 天

    [LV.4]

     楼主| 发表于 2020-8-17 16:20:42 | 显示全部楼层
    本帖最后由 新ちゃん 于 2020-8-21 03:59 编辑

    2、在/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/创建 __init__.py文件,文件内容如下:
    1. from . import tutorial
    2. from . import build
    复制代码

    3、将../bram/build拷贝到../tut/build中,具体jupyter命令如下
    1. !cp /home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/bram/build/ /home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/build
    复制代码

    4、在jupyter中执行以下代码

    1. import os
    2. os.chdir("/home/xilinx/RISC-V-On-PYNQ/")
    3. print(os.getcwd())
    复制代码

    即设置当前工作路径为/home/xilinx/RISC-V-On-PYNQ。接着继续执行以下代码:
    1. import sys
    2. sys.path.insert(0, '/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/')

    3. from tut.tutorial import TutorialOverlay

    4. overlay = TutorialOverlay("/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/tutorial.bit")
    复制代码

    没有报错后继续执行以下代码,进行移植的测试
    1. %%riscvc test overlay.tutorialProcessor

    2. int main(int argc, char ** argv){
    3.     unsigned int * arr = (unsigned int *)argv[1];
    4.     return arr[2];
    5. }
    复制代码

    执行结果如下:

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(20)


    表示编译成功,被编译的是test.c文件,若此步骤出现问题,请检查riscv32-unknown-elf-gcc命令是否能够正确执行、/home/xilinx/RISC-V-On-PYNQ/ip/路径下的picorv32_axi是否存在。

    5、接着运行编译出来的文件:在jupyter执行以下代码

    1. import numpy as np
    2. arg1 = np.array([4,2,3], np.uint32)

    3. retval = overlay.tutorialProcessor.run(test, arg1)

    4. if(retval != arg1[2]):
    5.     print("Test failed!")
    6. else:
    7.     print("Test passed!")
    复制代码

    测试成功后将会看到输出如下:

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(21)


    若出现如下错误信息:

    ‘Unaligned write: data length must be multiple of 4.’

    可将/usr/local/lib/python3.6/dist-packages/pynq/下的mmio.py文件的代码替换如下:

    1. #   Copyright (c) 2016, Xilinx, Inc.
    2. #   All rights reserved.
    3. #
    4. #   Redistribution and use in source and binary forms, with or without
    5. #   modification, are permitted provided that the following conditions are met:
    6. #
    7. #   1.  Redistributions of source code must retain the above copyright notice,
    8. #       this list of conditions and the following disclaimer.
    9. #
    10. #   2.  Redistributions in binary form must reproduce the above copyright
    11. #       notice, this list of conditions and the following disclaimer in the
    12. #       documentation and/or other materials provided with the distribution.
    13. #
    14. #   3.  Neither the name of the copyright holder nor the names of its
    15. #       contributors may be used to endorse or promote products derived from
    16. #       this software without specific prior written permission.
    17. #
    18. #   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    19. #   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    20. #   THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    21. #   PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
    22. #   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    23. #   EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    24. #   PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    25. #   OR BUSINESS INTERRUPTION). HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    26. #   WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    27. #   OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
    28. #   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

    29. import os
    30. import mmap
    31. import numpy as np

    32. __author__ = "Yun Rock Qu"
    33. __copyright__ = "Copyright 2016, Xilinx"
    34. __email__ = "pynq_support@xilinx.com"
    35. #add this function below
    36. def modify_size(length):
    37.     while(length%4):
    38.       length=length+1
    39.     return length
    40.      
    41. class MMIO:
    42.     """ This class exposes API for MMIO read and write.

    43.     Attributes
    44.     ----------
    45.     virt_base : int
    46.         The address of the page for the MMIO base address.
    47.     virt_offset : int
    48.         The offset of the MMIO base address from the virt_base.
    49.     base_addr : int
    50.         The base address, not necessarily page aligned.
    51.     length : int
    52.         The length in bytes of the address range.
    53.     debug : bool
    54.         Turn on debug mode if it is True.
    55.     mmap_file : file
    56.         Underlying file object for MMIO mapping
    57.     mem : mmap
    58.         An mmap object created when mapping files to memory.
    59.     array : numpy.ndarray
    60.         A numpy view of the mapped range for efficient assignment

    61.     """
    62.    
    63.     def __init__(self, base_addr, length=4, debug=False):
    64.         """Return a new MMIO object.

    65.         Parameters
    66.         ----------
    67.         base_addr : int
    68.             The base address of the MMIO.
    69.         length : int
    70.             The length in bytes; default is 4.
    71.         debug : bool
    72.             Turn on debug mode if it is True; default is False.

    73.         """
    74.         if base_addr < 0 or length < 0:
    75.             raise ValueError("Base address or length cannot be negative.")

    76.         euid = os.geteuid()
    77.         if euid != 0:
    78.             raise EnvironmentError('Root permissions required.')

    79.         # Align the base address with the pages
    80.         self.virt_base = base_addr & ~(mmap.PAGESIZE - 1)

    81.         # Calculate base address offset w.r.t the base address
    82.         self.virt_offset = base_addr - self.virt_base

    83.         # Storing the base address and length
    84.         self.base_addr = base_addr
    85.         self.length = length

    86.         self.debug = debug
    87.         self._debug('MMIO(address, size) = ({0:x}, {1:x} bytes).',
    88.                     self.base_addr, self.length)

    89.         # Open file and mmap
    90.         self.mmap_file = os.open('/dev/mem',
    91.                                  os.O_RDWR | os.O_SYNC)

    92.         self.mem = mmap.mmap(self.mmap_file, self.length + self.virt_offset,
    93.                              mmap.MAP_SHARED,
    94.                              mmap.PROT_READ | mmap.PROT_WRITE,
    95.                              offset=self.virt_base)

    96.         self.array = np.frombuffer(self.mem, np.uint32,
    97.                                    length >> 2, self.virt_offset)

    98.     def __del__(self):
    99.         """Destructor to ensure mmap file is closed
    100.         """
    101.         os.close(self.mmap_file)

    102.     def read(self, offset=0, length=4):
    103.         """The method to read data from MMIO.

    104.         Parameters
    105.         ----------
    106.         offset : int
    107.             The read offset from the MMIO base address.
    108.         length : int
    109.             The length of the data in bytes.

    110.         Returns
    111.         -------
    112.         list
    113.             A list of data read out from MMIO

    114.         """
    115.         if length != 4:
    116.             raise ValueError("MMIO currently only supports 4-byte reads.")
    117.         if offset < 0:
    118.             raise ValueError("Offset cannot be negative.")
    119.         idx = offset >> 2
    120.         if offset % 4:
    121.             raise MemoryError('Unaligned read: offset must be multiple of 4.')

    122.         self._debug('Reading {0} bytes from offset {1:x}',
    123.                     length, offset)

    124.         # Read data out
    125.         return int(self.array[idx])

    126.     def write(self, offset, data):
    127.         """The method to write data to MMIO.

    128.         Parameters
    129.         ----------
    130.         offset : int
    131.             The write offset from the MMIO base address.
    132.         data : int / bytes
    133.             The integer(s) to be written into MMIO.

    134.         Returns
    135.         -------
    136.         None

    137.         """
    138.         if offset < 0:
    139.             raise ValueError("Offset cannot be negative.")

    140.         idx = offset >> 2
    141.         if offset % 4:
    142.             raise MemoryError('Unaligned write: offset must be multiple of 4.')

    143.         if type(data) is int:
    144.             self._debug('Writing 4 bytes to offset {0:x}: {1:x}',
    145.                         offset, data)
    146.             self.array[idx] = np.uint32(data)
    147.         elif type(data) is bytes:
    148.             length = len(data)
    149.             num_words = length >> 2
    150.             length=modify_size(length)
    151.             if length % 4:
    152.                 raise MemoryError(
    153.                     'Unaligned write: data length must be multiple of 4.')
    154.             buf = np.frombuffer(data, np.uint32, num_words, 0)
    155.             for i in range(len(buf)):
    156.                 self.array[idx + i] = buf[i]
    157.         else:
    158.             raise ValueError("Data type must be int or bytes.")

    159.     def _debug(self, s, *args):
    160.         """The method provides debug capabilities for this class.

    161.         Parameters
    162.         ----------
    163.         s : str
    164.             The debug information format string
    165.         *args : any
    166.             The arguments to be formatted

    167.         Returns
    168.         -------
    169.         None

    170.         """
    171.         if self.debug:
    172.             print('MMIO Debug: {}'.format(s.format(*args)))
    复制代码

    6、测试成功后,为了安装资源到板子上,需运行下面的代码:

    1. !pip3.6 install --upgrade /home/xilinx/RISC-V-On-PYNQ/
    复制代码

    成功后出现如下信息:

    国内芯片技术交流-在PYNQ-Z2上移植RISC-Vrisc-v单片机中文社区(22)


    成功安装资源后便可直接进行移植、编译、运行而不用修改系统变量了。

    最后在/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/下的 __init__.py修改如下:

    1. # ----------------------------------------------------------------------
    2. # Copyright (c) 2018, The Regents of the University of California All
    3. # rights reserved.
    4. #
    5. # Redistribution and use in source and binary forms, with or without
    6. # modification, are permitted provided that the following conditions are
    7. # met:
    8. #
    9. #     * Redistributions of source code must retain the above copyright
    10. #       notice, this list of conditions and the following disclaimer.
    11. #
    12. #     * Redistributions in binary form must reproduce the above
    13. #       copyright notice, this list of conditions and the following
    14. #       disclaimer in the documentation and/or other materials provided
    15. #       with the distribution.
    16. #
    17. #     * Neither the name of The Regents of the University of California
    18. #       nor the names of its contributors may be used to endorse or
    19. #       promote products derived from this software without specific
    20. #       prior written permission.
    21. #
    22. # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    23. # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    24. # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    25. # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
    26. # UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
    27. # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    28. # BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
    29. # OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    30. # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
    31. # TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
    32. # USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
    33. # DAMAGE.
    34. # ----------------------------------------------------------------------
    35. from . import axi
    36. from . import bram
    37. from . import tut
    复制代码

    即可直接运行以下代码:
    1. from riscvonpynq.picorv32.tut.tutorial import TutorialOverlay

    2. overlay = TutorialOverlay("/home/xilinx/RISC-V-On-PYNQ/riscvonpynq/picorv32/tut/tutorial.bit")
    复制代码
    1. %%riscvc test overlay.tutorialProcessor

    2. int main(int argc, char ** argv){
    3.     unsigned int * arr = (unsigned int *)argv[1];
    4.     return arr[2];
    5. }
    复制代码
    1. import numpy as np
    2. arg1 = np.array([4,2,3], np.uint32)

    3. retval = overlay.tutorialProcessor.run(test, arg1)

    4. if(retval != arg1[2]):
    5.     print("Test failed!")
    6. else:
    7.     print("Test passed!")
    复制代码

    到此RISC-V在PYNQ-Z2的移植结束。
    本篇完,感谢关注:RISC-V单片机中文网
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